1. Field of the Invention
The present invention relates generally to field effect transistors and, more particularly, to a field effect transistor including a silicon oxide film and a nitrided oxide film as a gate insulator film, and a method of manufacturing such a field effect transistor.
2. Description of the Background Art
A nitrided oxide film formed by a rapid lamp annealing is a highly reliable insulator film to dielectric breakdown. This is disclosed in, for example, "Extended Abstract of the 21st Conference on Solid State Devices and Materials", Tokyo, p.197.
The nitrided oxide film is such a film that a large amount of nitrogen is included in an interface between the nitrided oxide film and a material beneath the nitrided oxide film. With a reduction in scale of devices, it is considered that such a nitrided oxide film is employed as a gate insulator film of a MOS (Metal Oxide Semiconductor) field effect transistor.
FIG. 71 is a schematic cross-sectional view of a MOS field effect transistor with a conventional single drain structure. Such a MOS field effect transistor is disclosed in, for example, Digest "International Electron Device Meeting 1989", p. 267. A source region 3a and a drain region 3b are formed with a spacing in a silicon substrate 1 having a main surface 2. A nitrided oxide film 5 is formed on main surface 2 between source region 3a and drain region 3b. A gate electrode 7 is formed on nitrided oxide film 5.
A description will now be made on a method of manufacturing such a MOS field effect transistor. First, silicon substrate 1 with a boron concentration of approximately 1.times.10.sup.17 /cm.sup.2 is prepared. A silicon oxide film of 70 .ANG. is formed on main surface 2 of silicon substrate 1. This silicon oxide film is then nitrided by lamp annealing in an atmosphere including ammonium. The nitridation is carried out at a temperature of 900.degree.-1100.degree. C. for 10-60 seconds. After the end of nitridation, the silicon oxide film is re-oxidized in an oxygen atmosphere. The re-oxidation is carried out at a temperature of 1000.degree.-1100.degree. C. for 10-300 seconds. Thus, nitrided oxide film 5 is formed.
Then, polycrystalline silicon of 2000-4000 .ANG. in thickness is formed on nitrided oxide film 5. The polycrystalline silicon film and nitrided oxide film 5 are then patterned by employing photolithography and etching technique, to form gate electrode 7. Silicon substrate 1 is then implanted with arsenic ions with gate electrode 7 used as a mask. Acceleration energy is 30-70 keV and a dose is 1.times.10.sup.15 /cm.sup.2 or more. After that, a resulting film is annealed to form source region 3a and drain region 3b. The steps of manufacturing the MOS field effect transistor is over through the foregoing processings.
The concentration of nitrogen in nitrided oxide film 5 depends on a nitriding atmosphere, nitridation temperature, nitridation time, re-oxidation time, an initial thickness of silicon oxide film and the like. That is, when a nitriding atmosphere is N.sub.2 O, nitrogen concentration is lower as compared to the case with an ammonium gas even though the same parameters are employed for other parameters. As re-oxidation time becomes longer, nitrogen concentration becomes lower. Nitrogen concentration becomes higher with a higher nitridation temperature, a longer nitridation time, a smaller initial thickness of silicon oxide film and a higher ammonium concentration.
There are two types of hot carriers that cause a deterioration in characteristics of MOS field effect transistors: drain avalanche hot carriers and channel hot holes (electrons). A channel hot hole (electron) phenomenon indicates a case where holes (electrons) traveling in a channel region 11 are accelerated by an electric field around drain 3b and then enter in a gate insulator film 6 near drain 3b as shown in FIG. 72. Silicon substrate, source region and gate electrode are denoted with reference characters 1, 3a and 7, respectively. The channel hot holes (electrons) are also called channel hot carriers. In a case with an NMOS transistor, channel hot carriers are channel hot electrons, while in a case with a PMOS transistor, channel hot carriers are channel hot holes.
A description will now be given on drain avalanche hot carriers with reference to FIG. 73. When accelerated carriers collide with lattice of Si, electron-hole pairs are generated. At that time, holes (electrons) are drawn by a gate voltage and enter into gate insulator film 6. It depends on the type of a MOS transistor whether electrons or holes enter into gate insulator film 6. Electrons enter in the case of an NMOS transistor, while holes enter in the case of a PMOS transistor.
Both the channel hot holes (electrons) and the drain avalanche hot carriers are generated near the drain. However, it appears that the channel hot holes (electrons) are generated closer to the source than the drain avalanche hot carriers. If a comparison is made between a gate voltage provided when channel hot holes (electrons) are generated and that provided when drain avalanche hot carriers are generated, the gate voltage provided with generation of the channel hot holes (electrons) is higher. As the gate voltage becomes higher, the holes (electrons) which enter in gate insulator film 6 are largely affected by the gate electrode. That is, with a larger gate electrode, the holes (electrons) which enter in the gate insulator film are more strongly drawn to the gate electrode.
In a portion of the gate electrode, into which hot carriers are entered, interface states or traps are generated, causing a deterioration in characteristics of MOS field effect transistors. Interface state is an energy level which allows transmission/reception of charges to/from Si substrate in a Si-SiO.sub.2 interface region. Trap is a portion that serves to trap or capture conduction electrons or holes contributing to electric conduction to prevent the contribution to electric conduction.
The drain avalanche hot carriers and the channel hot holes (electrons) have the following nature. With reference to FIG. 74, this field effect transistor has an LDD structure. A high concentration source region 19a and a high concentration drain region 19b are formed to be spaced apart from each other in a silicon substrate. A low concentration source region 15a is formed in the inside of high concentration source region 19a, while a low concentration drain region 15b is formed in the inside of high concentration drain region 19b. Sidewall insulating films 13a and 13b are formed on opposite sides of a gate electrode 7.
Respective amounts of injected hot carriers in respective cases where the concentration of low concentration drain region 15b is low, medium and high are shown in the figure. Channel hot electrons are denoted with CHE, and drain avalanche hot carriers with DAHC. For the channel hot electrons, its peak value of the amount of injected carriers does not change even if the concentration of low concentration drain region 15b changes. For the drain avalanche hot carriers, its peak value (P) of the amount of injected carriers increases with an increase in concentration of low concentration drain region 15b. In addition, the peak value (P) of the drain avalanche hot carriers shifts to the side of a channel region with an increase in concentration of low concentration drain region 15b.
As the gate voltage becomes higher, a hot carrier resistivity of nitrided oxide film becomes lower than that of silicon oxide film. This is described as follows. A threshold value (V.sub.th) is measured before application of stresses, and then stresses are applied. As stresses, the following four conditions are provided: a gate voltage of 1.0 V in absolute value, a drain voltage of 6.0 V and a time of 1000 seconds; a gate voltage of 2.5 V (2.0 V for PMOS) in absolute value, a drain voltage of 6.0 V and a time of 1000 seconds; a gate voltage of 4.0 V in absolute value, a drain voltage of 6.0 V and a time of 1000 seconds; and a gate voltage of 6.0 V in absolute value, a drain voltage of 6.0 V and a time of 1000 seconds. After stresses are applied, threshold values are measured. Thus, the difference between threshold values before and after the application of stresses, i.e., a shift of threshold value is measured. FIG. 75 shows the case with an NMOS field effect transistor, and FIG. 76 shows the case with a PMOS field effect transistor. The lateral axis indicates a gate voltage in the application of stresses. As the amount of generated hot carriers increases, the shift of threshold values increases.
As shown in FIG. 75, in the case with the NMOS field effect transistor, if a gate voltage is lower, the shift of threshold value for nitrided oxygen film is smaller than that for silicon oxide film. That is, the hot carrier resistivity of the nitrided oxide film is higher than that of silicon oxide film. However, if the gate voltage is higher, the shift of threshold values for the nitrided oxide film is larger than that for the silicon oxide film.
In the case with the PMOS field effect transistor shown in FIG. 76, if the absolute value of the gate voltage is smaller, the shift of threshold values for the nitrided oxide film is approximately the same as that for the silicon oxide film. That is, the hot carrier resistivity of the nitrided oxide film is the same as that of the silicon oxide film. However, if the absolute value of the gate voltage is higher, the shift of threshold values for the nitrided oxide film is larger than that for the silicon oxide film.
According to "1982 Symposium on VLSI Technology Digest" p. 40 by Eiji Takeda et al, it is disclosed that when a gate voltage is 4 V or less, drain avalanche hot carriers are liable to be generated, and when the gate voltage is 4 V or more, channel hot electrons are liable to be generated. Therefore, as shown in FIG. 75, in the NMOS field effect transistor, the nitrided oxide film is more resistive to drain avalanche hot carriers as compared to the silicon oxide film, and the silicon oxide film is more resistive to channel hot electrons as compared to the nitrided oxide film. In the PMOS field effect transistor, as shown in FIG. 76, both the silicon oxide film and the nitrided oxide film exhibit approximately the same resistivity to drain avalanche hot carriers, and the silicon oxide film is more resistive to channel hot holes as compared to the nitrided oxide film.
In a CMOS (Complementary MOS) circuit, it is possible that either an NMOS transistor or PMOS transistor is put in a high gate voltage state. As has been described above with reference to FIGS. 75 and 76, when the nitrided oxide film is used as a gate insulator film, if the absolute value of a gate voltage is higher than that provided when the silicon oxide film is used as the gate insulator film, the hot carrier resistivity deteriorates in both the NMOS transistor and the PMOS transistor. Accordingly, when the MOS transistor including the nitrided oxide film as the gate insulator film is incorporated into the CMOS circuit, such a disadvantage is provided that the hot carrier resistivity of the circuit decreases as compared to the transistor including the silicon oxide film as the gate insulator film.
FIGS. 77 and 78 are diagrams showing voltage-current characteristics of the MOS field effect transistor disclosed in the aforementioned document, Digest "International Electron Device Meeting 1989," p. 267. FIG. 77 shows the case with the NMOS transistor, and FIG. 78 shows the case with the PMOS transistor. In the figures, a symbol NO indicates a nitrided oxide film, and PO indicates a pure oxide film.
As shown in FIG. 77, when an NMOS field effect transistor including an NO film as a gate insulator film is employed at a lower gate voltage, such an NMOS field effect transistor exhibits a lower current handling capability than that of an NMOS field effect transistor including the pure oxide film as the gate insulator film. As shown in FIG. 78, when a PMOS field effect transistor including the NO film as the gate insulator film is employed, such a PMOS field effect transistor exhibits a lower current handling capability at any gate voltages as compared to a PMOS field effect transistor including the pure oxide film as the gate insulator film. The deterioration in current handling capability means a deterioration in higher speed performance of circuits.
As the number of traps increases, the characteristics of the field effect transistor deteriorates. It is presumed according to an experiment conducted by the inventor of the present application that a nitride film has more traps than a nitrided oxide film. This will be described in embodiments of the invention.